The present invention is directed, in general, to a semiconductor device that includes a dielectric material that has a high dielectric constant (K) and a metal barrier layer for that dielectric material, and, more specifically, to a semiconductor device having a capacitor or gate with a high K dielectric material incorporated within the capacitor or gate and a metal barrier layer for that dielectric material.
As device dimensions within semiconductor devices, such as capacitors or gates within integrated circuits (ICs), continue to shrink to accommodate increased packing density, the dimensions of the various components within these semiconductor devices must shrink proportionally for proper operation of the IC. Problems have particularly arisen with respect to the dielectric layers that form a part of capacitors and gates, such as capacitor dielectric layers and gate oxide layers.
For example, capacitor structures often found within today""s IC designs have evolved to include high K dielectrics, such as tantalum pentoxide (Ta2O5). However, the use of Ta2O5 has encountered oxygen diffusion problems. In many capacitor structures, silicon nitride (SiN) is often used as a barrier layer to prevent oxygen diffusion from the capacitor electrode into surrounding silicon and to prevent silicon diffusion into the capacitor electrode. Titanium nitride (TiN) has also been used as a capacitor electrode in back-end capacitor. While TiN has worked well as an electrode, its use poses problems when used with Ta2O5. When TiN comes into direct contact with Ta2O5, the TiN xe2x80x9cstealsxe2x80x9d oxygen from the Ta2O5. The depletion of oxygen from the Ta2O5 can lead to a decreased capacitance, which, of course is undesirable for proper capacitor operation.
Tantalum pentoxide (Ta2O5) has also found use in transistor gate structures because gate oxide thicknesses have decreased to accommodate the overall decrease in device size. Currently, a typical thickness of the gate oxide is about 2 nm. However, conventional silicon dioxide gate oxides have begun to run into functional limitations. For example, the industry has found that if the silicon dioxide thickness goes below about 2 nm, it is easily tunneled through and, thus, stops functioning as an oxide. The tunneling currents can degrade the transistor""s performance, which, of course, is undesirable. Moreover, as the size decreases, it is highly desirable to keep the gate capacitance as high as possible, inasmuch as the transistor drive current is proportional to the gate capacitance. If the device size is to be scaled down further, it must be done so without reducing the transistor""s drive current.
To alleviate this problem, the semiconductor industry has recently begun to use high K dielectric materials, such as Ta2O5, within the gate oxide structure. However, as is the case with capacitors, the use of Ta2O5 has also encountered problems within the gate structure. For example, Ta2O5 is also easily reduced by silicon just as it is easily reduced by TiN. In other words, the silicon with which the Ta2O5 is typically in contact, getters oxygen from the Ta2O5. Again, this is an undesirable result because, as previously mentioned, it is important to keep the gate capacitance as high as possible. If oxygen is taken away from the Ta2O5 layer, its capacitance will decrease and could possibly cause the transistor to malfunction or fail all together.
Accordingly, what is needed in the art is a semiconductor device in which a high K dielectric material can be used to maintain the desired degree of capacitance while avoiding reduction by surrounding materials. The present invention addresses this need.
To address the above-discussed deficiencies of the prior art, the present invention provides a semiconductor device that has a metal barrier layer for a dielectric material, which can be incorporated into an integrated circuit. The semiconductor device provides a capacitance to the integrated circuit. In a preferred embodiment, the semiconductor device comprises a first layer disposed over a substrate. A metal barrier layer, which is susceptible to oxidation by oxygen, is disposed over the first layer. A high K capacitor dielectric layer (i.e., a higher K than silicon dioxide) that contains oxygen, such as tantalum pentoxide, is located over the metal barrier layer. In a preferred embodiment, the high K dielectric layer may be susceptible to oxygen depletion by the first layer. Furthermore, the metal barrier layer may serve as an oxygen diffusion barrier layer between the first layer and the high K dielectric layer. The semiconductor device further includes a second layer located over the high K capacitor dielectric layer.
In one embodiment, the semiconductor device is a transistor gate located over a doped transistor tub region wherein the first layer is a portion of the doped transistor tub region. The second layer is a transistor gate that is located over the high K capacitor dielectric layer, and the high K capacitor dielectric layer is located over the doped transistor tub region and serves as a gate oxide layer for the transistor gate. The metal from which the metal layer may be formed, preferably a metal such as aluminum, can be easily oxidized. Other exemplary metals include zirconium hafnium, and yttrium. In another aspect, the gate oxide layer contains tantalum pentoxide, which has a dielectric constant that is higher than that of silicon dioxide. The gate oxide layer may have a thickness that ranges from about 2 nm to about 7 nm. Thus, in this particular embodiment, the semiconductor device is a front-end transistor structure that provides a capacitance to the integrated circuit.
In another embodiment, the semiconductor device is a capacitor, which may be formed in the back-end of the fabrication process. In one aspect, the first layer is a metallic layer, such as titanium nitride, that is located under the high K capacitor dielectric layer. In such embodiments, the capacitor may be located within an opening that is located in a dielectric layer of the integrated circuit and overlays a transistor level of the integrated circuit. As with previous embodiments, the metal barrier layer preferably contains aluminum and may have a thickness that ranges from about 0.2 nm to about 4 nm.
In another aspect, the present invention provides a method of forming an integrated circuit on a semiconductor wafer. In a preferred embodiment, the method comprises forming a doped transistor tub region within a substrate of the semiconductor wafer, forming an integrated circuit substrate over the doped transistor tub region, and forming a device within the integrated circuit for providing a capacitance to the integrated circuit. Forming the semiconductor device includes forming a first layer over a substrate and forming a metal barrier layer, such as aluminum, which is susceptible to oxidation by oxygen, on the first layer. The method further comprises forming a high K capacitor dielectric layer containing oxygen, such as tantalum pentoxide, over the metal barrier layer. In a preferred embodiment, the high K dielectric layer may be susceptible to oxygen depletion by the first layer. As such, the metal barrier layer serves as an oxygen diffusion barrier layer between the first layer and the high K dielectric layer. The method further includes forming a second layer over the high K capacitor dielectric layer.
The foregoing has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.